Integrated circuit memory devices are well known and widely used within the electronics industry. Driven by the needs of the industry, IC memory producers have continued to design and build ever more complex and dense memory devices. The state of the art in memory devices is such that today a memory device containing 4 million bits of data is the same physical size as a memory device containing 500 bits was eight years ago.
A result of the dramatic increase in the density of the memory devices is an equally dramatic increase in the precision and care required to produce the devices. The slightest imperfection or anomaly in the manufacturing process will cause a defective device to be produced. Since a device cannot be tested until all the manufacturing processes are completed, considerable time and expense is wasted on each defective device.
As the memory devices become denser, the yield of good devices to bad devices goes down, thereby effectively increasing the cost of producing good devices. The memory device industry has recognized that often a defective device has only one or a few bad memory cells out of the millions of cells that make up the device. Also the bad memory cells are often grouped closely together as a result of a localized problem that occurred during manufacturing.
To increase the yield of useable devices, the manufacturers of memory devices in the prior art have designed the devices to contain redundant rows and columns of memory cells that can replace bad rows and columns as necessary. Generally, no more than two redundant rows and columns are provided. After testing, a high resolution laser is used to disconnect the row or column of cells that contains the defective cell. A redundant row or column is then connected in place of the defective row or column by enabling complex circuitry on the memory device. While this process works, the process has many drawbacks. For example, a laser having the required resolution of about 1 micron (one millionth of a meter) is very expensive and requires elaborate and expensive optical alignment systems to control where on the device the laser cuts. Also, the memory cells operate at low analog voltage levels where the signal to noise ratio is very low. Splicing in the redundant cells adds to the interconnection length and circuitry required to connect the cells to sensors used to detect the voltage levels of the cells. This additional connection length and circuitry reduces the signal to noise level further and slows down the operation of the memory device.
The memory industry clearly needs a solution to the low yield problem that does not adversely affect the performance of the memory device and eliminates the need for high resolution lasers.